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Development of micro assembly processes for further miniaturization in electronics production

2023-12-12 来源:星星旅游
CIRPAnnals-ManufacturingTechnology59(2010)1–4ContentslistsavailableatScienceDirect

CIRPAnnals-ManufacturingTechnology

journalhomepage:http://ees.elsevier.com/cirp/default.asp

Developmentofmicroassemblyprocessesforfurtherminiaturizationinelectronicsproduction¨ßlerK.Feldmann(1)*,J.Franke,F.SchuInstituteforManufacturingAutomationandProductionSystems,UniversityofErlangen-Nuremberg,GermanyARTICLEINFOABSTRACTKeywords:MiniaturizationAssemblySolderingSteadyincreaseoffunctionalityandconcurrentreductionofthepackagesizeareoneofthekeydrivingforcesinelectronicsproduction.Inthispaperwewillpresentsolutionsdevelopedattheinstitutefortheautomatedassemblyofhighlyminiaturizedflip-chipswithpitchesdownto100mm.Inparticularthepresentandfutureinfluencesofminiaturizationonthemainprocessstepswaferbumping,componentplacement,reflowsolderingandinspectionareexaminedaswellastheinfluencesoncomplementarymaterialsused.Resultsregardingtheachievableyieldafterassemblyandthereliabilityofthestructureswillbepresentedinadditiontoananalysisofthefailuremechanisms.ß2010CIRP.1.IntroductionTheminiaturizationinelectronicsisundauntedandisdrivenbyalargevarietyofapplications(e.g.opto-electronics)[1].Integra-tionoffunctionalityinelectroniccomponentsatthefirstlevelhastobeaccompaniedwithasignificantreductionofthestructuresforthesecondlevelinterconnectsaswellasareductioninsizeofthecomponentpackaging.Needlesstosay,thehandlingandassemblyprocessesduringthemanufacturingoftheelectronicdeviceshavetomeettherequirementsofminiaturizationaswell.Intermsofsizereductionforelectroniccomponentsflip-chiptechnologyhasbecomeveryimportant.Awiderangeofwaferlevelbumping-technologiesforsoldersphereshavebeenestablishedinrecentyearsandthepotentialforfurtherminiaturizationofthesolderspheresisgiven.However,standardassemblyprocessesandmaterialsofsurfacemounttechnologyhavetobeadaptedtothistrendaswell.1.1.Bumping-technologiesforflip-chipsTheC4-processinventedbyIBMwasthefirsttomaketheassemblyofflip-chipspossibleinthe1960sandisstillinusetoday.Inthemeantimebumping-technologiesweredevelopedwiththeaimtoprovidehigh-yielded,fastandcost-efficientprocesseswiththepotentialoffurtherminiaturization.Thestencilprintingprocessisstillthemainprocessforflip-chipbumpingduetoeconomicalreasons.Pitchesof120mmcanberealizedatproductionlevelwithconventionalstencils,buttheprintingofsolderbumpswithapitchof60mmhasbeenshownusingspecialnano-coatedstencils[2,3].Forhighbumpcountsperwaferandveryfinepitchesdownto50mmtheelectroplatingprocessiscommonlyused[4].However,thistechnologyhascomplexprocessesandexpensivetoolingcosts.Accordingto[5,6]solderspheresofvariousalloyscanbeformedwiththeveryflexiblesolderjettingordirectdropletdeposition.TheC4NP(ControlledCollapseChipConnectionNewProcess)enablesminimalpitchesof50mm,butthemoldsinwhichthesolderspheresareformedhavetobemanufacturedforeachwaferlayout[7].Atechnologyforveryfinepitchcomponentsisdescribedin[8].Here,metallicpinsareinsertedintoaductilesubstratematerialtobuildtheelectricalconnection.Pitchesdownto30mmcanberealized.1.2.Processchainforflip-chipassemblyBasicallyflip-chipscanbeassembledontotheprintedcircuitboard(pcb)usingdifferenttechnologies.Besidesadhesivesandthermocompressionbondingsolderingisthemostprevalentflip-chiptechnology.Theuseofunderfillisinevitablewhenusingsolderinterconnectsbecauseofthelargethermalmismatchbetweenthesilicondie,thesolderandtheorganicsubstratematerial.Inprincipletwodifferentprocesschainsareindustriallyimplemented(Fig.1):capillaryflowunderfill(CFU)andnoflowunderfill(NFU).WhenusingCFUthechipisassembledontothesubstrateatfirst.Afterreflowsolderingtheunderfillisappliedandfillsthegapbetweenthedieandthepcbusingthecapillaryeffect[9].IfNFUisused,adefinedvolumeofthepolymericencapsulantisdispensedonthepcbandtheflip-chipisassembledafterwards[10].Thecuringoftheepoxyandthereflowofthesolderaredoneinone-processstep.2.ChallengesintheassemblyofminiaturizedcomponentsIndependentlyfromtheindustrytheyieldofproductionandthereliabilityoftheproduceddevicesareveryimportant.Botharehighlyinfluencedbyvariousfactorsthatbecomeevenmoreinfluentialwithminiaturization.Exemplaryreasonsaretolerancesoftheprocessesandcomponentsnottakenintoaccountin*Correspondingauthor.E-mailaddress:feldmann@faps.uni-erlangen.de(K.Feldmann).0007-8506/$–seefrontmatterß2010CIRP.doi:10.1016/j.cirp.2010.03.0052K.Feldmannetal./CIRPAnnals-ManufacturingTechnology59(2010)1–4Fig.1.Processesfortheassemblyofflip-chipsonprintedcircuitboards.macroscopicscaleandontheotherhandmaterialsthatarenoteligibleforhighlyintegratedproductsatthemoment.Thefollowingsectionswillnameinfluencesanddiscussthecausesandeffectsthathavebeennotedduringtheprocessingofflip-chipswithapitchof100mm.2.1.SubstratematerialandstructuringDuetothemissinginterposerwiththeroleofacompensatinglayerbetweenthepcbandthesilicondie,thethermo-mechanicalpropertiesofthesubstratematerialbecomemoreandmoreimportantinflip-chiptechnology(Fig.2).Withthedecreasingsizeespeciallythermo-mechanicalpropertiesliketheCoefficientofThermalExpansion(CTE)andthewarpageareofhighsignificance,sincetheyareresponsibleforlowreliabilityofinterconnectsandopensolderjoints.Respectivelythemetallizationorstructuringtechnologyismostoftenthelimitingfactorinminiaturizationsinceitspecifiesthepossibleminimumlinesandspaces.Theexperimentsshowthattheuniformityofthelandsisofhighestimportancesinceherebythethermallyinducedstresscanbereducedtoaminimumwhatisconducivetothereliabilityofthesolderjoints.However,thelayoutofthesoldermask,itsregistra-tionaccuracyanditsdiameterinfluencelikewisetheyieldafterreflowaswellasthelong-termreliability,whichisdiscussedindetailinSection4.2.2.UnderfillmaterialDuetothethermalmismatchbetweenthedieandthepcbthepropertiesoftheunderfillmaterialareofgreatrelevance(Fig.3).EspeciallytheCTEhastobeadaptedtothethermalpropertiesofthepcbandthesilicondie.Togainvaluesaslowaspossible,fillermaterialcanbeaddedtotheepoxymatrix.Typicallywithafillercontentof70%theCTEofanepoxycanbereducefrom65to70ppm/Kto20ppm/K.Buthighfillercontentsleadtoanincreaseofviscosityoftheunderfillwhatiscontrarytotherequirementsofgoodflowpropertiesinverysmallgapsbetweendieandpcb.Thereductionofthefillersizeleadstoanincreasedviscosity,too,duetotheenlargementofthesurfaceoftheunderfill.Thus,theFig.2.Substrateparametersthatinfluencethereliabilityofflip-chipbonds.Fig.3.Influencesbytheunderfillmaterialonthereliabilityoftheflip-chipbond.challengeduringtheexperimentswastoguaranteeacompleteunderfillofdownto20mmsmallgapswithconcurrentlygoodlong-termreliability.InsummarytheCTEandthefillersizehavebeenthemostcrucialfactorsinunderfillselectionduringtheexperiments.2.3.AssemblyprocessesThefirstprocessintheassemblylineisthecomponentplacement.Theaccuracyoftheassemblymachineitselfaswellastheabilityofthevisionsystemtosecurelyidentifystructuresdownto30mmarekeyfactorsforahigh-yieldedproduction.Fortheprocessingofthinnedsilicondiestheplacementforceplaysanimportantrole,too.Forreflowsolderingusuallystandardtemperatureprofilescanbeused,butsolderinghastoberealizedunderinertgasatmospherebyallmeans.Duringunderfillapplicationthesubstratetemperaturehassignificantinfluenceontheflowbehavioroftheepoxy,butmostcrucialarefluxresiduesthatpreventtheunderfillfromcompletelyfillingtheareaundertheflip-chipleadingtoreducedreliability.Thevoidformationcanbeanissueaswell.Thereforethesubstrateshavetobedriedadequatelybeforesolderingandunderfilling.3.ManufacturingprocessesforhighlyminiaturizedcomponentsMaterialpropertiesthatinfluencetheassemblyofextremelyminiaturizedelectronicdevicesatmostweredescribed.Inthefollowingsectionthemanufacturingoftheflip-chips,thestructuringofthesubstratesandtheassemblyofthecomponentsusedduringtheexperimentsaredescribed.Allequipmentusedisfromprocessesofthestandardsurfacemounttechnologytryingtomaketheprocesschainverycost-efficient.3.1.WaferlevelsolderapplicationIntermsofwaferbumpingtheaimwastoevolvetheWaferLevelSolderSphereTransfertechnology(WLSST)fortheplace-mentofsolderspheresdownto30mm.Thusfar,spheresof60mmand50mmindiametercanbeplacedonawaferwithflip-chipswithapitchof100mmandathicknessof800mm.WiththeWLSST-processallpreformedsolderspheresareplacedonthewaferinonesingleprocesswiththeintegrationofthenecessaryprocessstepsforwaferbumpinglike:fluxingofthewafer,placementandsolderingofthespheres,allinspectionprocessesandevenareworkprocessifapplicable.Inthefirstprocessstepastencilisplacedoverareservoirfilledwithsolderspheresoftheappropriatediameter.Thesolderspheresarebroughttovibrationbyultrasoundtopreventthemfromagglomerating.Stencilsareofthesametechnologylikeknownfromconventionalstencilprintingofthesurfacemounttechnology.ThepatterningofthestencilscorrespondstotheI/O-layoutofthewafer.Thesolderspheresarepickedupbythestencilinthenextprocessstepbyvacuumandtheyareinspectedformissingorsparespheres.ThestencilisthenalignedtothewaferonK.Feldmannetal./CIRPAnnals-ManufacturingTechnology59(2010)1–43

Fig.4.Twodifferentpaddesignswereusedduringtheexperiments.whichfluxhasbeenpre-applied.Afterplacingthesolderspheresontothewaferthereflowprocessstarts.Thisresultsinreadilybumpedwafer.Thestencilcanbeplacedoverthereservoirorthewafer,respectively,withanaccuracyof15mm,makingtheprocessapplicableevenforverysmallsolderspheres.Besidestheaccuracyofthedrivesandthevisionsystems,thequalityofthegeometryandtheedgesofthestencilopeningsareessentialaswell.Currentlysoldersphereswithadiameterof60mm(104,152spheresperwafer)canbeprocessedwithayieldof99.8%perwafer.3.2.AdvancedstructuringoflowcostsubstratematerialsThesubstratematerialappearedtobeoneofthemostrelevantcomponentsduringtheassemblyofthetestspecimenregardingthereliabilityofthewholepackage.Thisisduetotheaccuracyofthestructuringortheregistrationofthesoldermask,respectively.AnothercriticalfactoristheCTEofthesubstratematerialthatissignificantlyhigherthantheCTEofsilicon,becauseoftheaimtouselowcostsubstratematerialsandnoanorganicmaterials.TheFR4-andBT(Bismaleimid-Triazin)-substrateswithathicknessof800mmweremanufacturedaccordingtostandardprocessesofpcbmanufacturing.Linesof20mmandspacesof40mmhavebeenrealizedwithadaptedprocessparameters.Additionallyasoldermaskwitharegistrationlowerthan10mmwasappliedaswell.Fig.4showsexemplaryforthe60mmand30mmsolderspheresthepaddesignsthatwereusedduringtheexperiments.3.3.AssemblyofthecomponentsTheflip-chipswereassembledonthepcbusingadip-fluxprocessandahighprecisionassemblingmachine.Inthefirstprocessstepsolderbumpsofthedieweredippedintotackyfluxwithadepthof25mmandthenplacedontothesubstrate.Forreflowsolderinganadaptedtemperatureprofileforlead-freesolderswasused.AfterreflowtheunderfillwasdispensedinL-shapeandcuredatappropriatetemperaturesafterwards.Table1Assemblyyieldforflip-chipswith60mmand50mmsolderbumps.Assemblyparameters(paddesignYield(afterreflowandsolderspherediameter)andunderfill)(%)Teardropdesign60mm90Conventionaldesign60mm90Teardropdesign50mm81Conventionaldesign50mm83Fig.5.Weibullplotforflip-chipswith60mmsolderbumpsandunderfillBonteardropdesign.TheassemblyyieldisgiveninTable1.Forflip-chipswithsolderspheresof60mmagoodyieldof90%canbeachieved.Forthemalfunctioningdiesthefailurecanbetrackeddowntojustoneside(peripheralI/O-patterning)ofthechip.Thatleadstotheconclusionthattolerancesinthesoldermaskregistrationandinsufficientstructuringaretherootcausesfor10%rejectsduringproduction.Thosetolerancesareevenmorecriticalforflip-chipswithsolderspheresof50mmdiameter.Heretheyielddropsadditionallyabout7–9%leavinganassemblyyieldof81%or83%,respectively.Intotalfourdifferentunderfills(A–D)wereusedwiththetwopaddesignsshownabove.Accordingtothedatasheetallunderfillswerequalifiedfortheneedsofthedeviceunderinvestigation.Themostimportantfactorwastofillgapsbetweenthesurfaceofthepcbandthebottomsideofthediebetween25mm(60mmsolderspheres)and20mm(50mmsolderspheres),whichrequiresparticlesizesof1/3ofthegaptobefilled.TheunderfillsdifferentiateintermsofCTEandfillercontent.4.Reliabilitytestingandfailuremechanisms4.1.EstimationofthereliabilityReliabilitytestingofthetestcouponswascarriedusingtemperatureshockcyclingfromÀ408Cto+1258Cfor1000cyclesaccordingtoDINEN60068-2-14.TheresultsfromthistestareillustratedintheweibullplotinFig.5fortheflip-chipswith60mmsolderspheresassembledonthesubstrateswithteardropdesign.Thisshowstheimportanceofthechoiceofunderfill.UnderfillAshowsverypoorresultswithallflip-chipsshowingfailuresafteronly50temperaturecycles.AnexplanationfortheseresultsisgiveninSection4.2.Contrary,underfillBshowssignificantlybetterresultswithacharacteristiclifeof2067cyclescalculatedusingthemaximumlikelihoodmethod.Additionally,overhalfofthefailuresoccurbefore300cycles.So,theycanbeconsideredearlyfailures.Theformfactor(0.8)forthisexperimentalsobearsoutthisstatement.Thisleadstotheconclusionthataninsufficientsolderjointistherootcauseforthat(seealsoSection4.2).Fig.6.Solderjointcrackingduetoinsufficientunderfilling.4K.Feldmannetal./CIRPAnnals-ManufacturingTechnology59(2010)1–4Fig.7.Soldermaskcanleadtoweakpointsinthesolderjoint.Flip-chipswith60mmsolderbumpswereassembledusingunderfillCandDaswellonsubstrateswiththeconventionalpaddesign.Withthosetwounderfillsjustonefailurewasdetectedafter728cyclestemperatureshocktestingforunderfillD.Seenfromthegivenanglesitbecomesclearthattheexperimentsshowhowimportanttheselectionofunderfillis.4.2.IdentificationoffailuremechanismsAccordingtothereliabilitytesting,dependingontheunderfillused,verygoodresultscanbeachievedintermsoflong-termreliabilityofthetestspecimen.Nevertheless,someearlyfailuresoccurandspecificfailuremechanismscanbedetermineddependingontheunderfillandthelayoutofthelands.Althoughintendedtofillgapsof25mmunderfillAshowedveryinsufficientreliabilityduringtemperatureshockcycling.ThereasonthereforeisshowninFig.6.Theunderfill,appliedinL-shape,ranalongallfoursidesmakingtheimpressionofacompleteUnderfill(raceeffect).Afterpulltestsitbecameclearthattheunderfilldidnotfilltheareaunderthedie,butalargevoidformedunderit.Bythismeansextremeshearingloadsapplyonthesolderjointsleadingtosolderjointcracking(Fig.6,right).Fig.7illustratesexemplarilytherootcausefortheearlyfailuresdetectedforunderfillBandlayoutA.Thesketchinthemiddleshowsthattheopeningofthesoldermaskhasadiagonalshapetowardsthepcb.Thisisduetomanufacturingreasons,butbecomesmoreobviouswithverysmallstructures.Becauseofslightmisalignmentsinthesoldermaskregistrationsomeofthesoldermaskcoverspartsofthepadsonthepcb(Fig.7,left).Fig.7,rightside,illustratestheresultingsolderjoint.Whatcanbeseenisanotchdefinedbythesoldermaskthatleadstoincreasedstrainsinthesolderjoint.Thisagainresultsinearlyfailuresbysolderjointcracking.5.ConclusionMiniaturizationisanomnipresenttrendinelectronicsproductionandbringsalongalargevarietyofchallengesforcomponentsaswellasfortheassemblyprocesses.Withinthispaperwegaveanoverviewaboutthemostimportantchallengesandthosewiththehighestinfluenceduringtheresearchdescribedindetail.Further,wehaverealizedacost-efficientmanufacturingandassemblyprocessesfortheprocessingofflip-chipswithapitchof100mmonlowcostsubstratematerials.Additionallywegaveanestimationofthereliabilityoftheassembleddevicesanddescribedfailuremechanisms.Thetolerancesinsubstratemanufacturingandtheunderfillselectionwereidentifiedasthemostcrucialfactors.Acknowledgements

ThisresearchanddevelopmentprojectisfundedbytheGermanFederalMinistryofEducationandResearch(BMBF)withintheFrameworkConcept‘‘ResearchforTomorrow’sProduction(02PG2363)andmanagedbytheProjectManagementAgencyKarlsruhe(PTKA).Theauthorisresponsibleforthecontentsofthispublication.References

[1]FeldmannK,CraiovanD,RoeschM(2007)DevelopmentofSpecificTechnol-ogiesandAssemblySystemsfortheNewChallengeofElectro-opticalDevices.CIRPAnnals-ManufacturingTechnology56/1:29–32.[2]ManessisD,PatzeltR,OstmannA,AschenbrennerR,ReichlH,etal,(2005)TechnologicalAdvancementsinLead-FreeWaferBumpingUsingStencilPrint-ingTechnology.EuropeanMicroelectronicsandPackagingConference427–433.[3]ManessisD,PatzeltR,OstmannA,AschenbrennerR,ReichlH,AxmannA,LaentzschC,KleemannG,etal,(2008)EvaluationofInnovativeNano-CoatedStencilsinUltra-Fine-PitchFlipChipBumpingProcesses.IMAPS200841stInternationalSymposiumonMicroelectronics438–445.[4]KleinM,HutterM,OppermannH,FritzschT,EngelmannG,DietrichL,WolfJ,Bra¨merB,DudekR,ReichlH,etal,(2008)DevelopmentandEvaluationofLeadFreeReflowSolderingTechniquesfortheFlipChipBondingofLargeGaAsPixelDetectorsonSiReadoutChip.58thElectronicComponentsandTechnologyConference,1893–1899.[5]KeßlingO,Schu¨ßlerF,FeldmannK,LuethTC,etal,(2008)ANewProcessforFlip-ChipInterconnectionsWithVariableStand-Offs.10thInternationalElec-tronicsPackagingTechnologyConference,620–625.[6]ChunJH,HsiaoW(2003)EffectsofSurfaceRoughnessonSolderBumpFormationbyDirectDropletDeposition.CIRPAnnals-ManufacturingTechnology52/1:161–164.[7]DangB,ShihDY,BuchwalterS,TsangC,PatelC,KnickerbockerJ,GruberP,KnickerbockerS,GarantJ,SemkowK,RuhmerK,HughlettE,etal,(2008)50mmPitchPb-FreeMicro-BumpsbyC4NPTechnology.58thElectronicCom-ponentsandTechnologyConference,1505–1510.[8]FendlerM,DavoineC,MarionF,Saint-PatriceD,FortunierR,RibotH,etal,(2009)AFluxlessandLow-TemperatureFlipChipProcessBasedonInsertionTechnique.IEEETransactionsonComponentsandPackagingTechnologies32(1):207–215.[9]TanakaA,HappoyaA,InoueM,OkayamaS,etal,(2008)StudyofStresstoSolderJointbyUnderfillFilling.41stInternationalSymposiumonMicroelec-tronics,481–488.[10]ThorpeR,BaldwinDF(2001)YieldAnalysisandProcessModelingofLowCost,HighThroughputFlipChipAssemblyBasedonNoFlowUnderfillMaterials.IEEETransactionandElectronicsPackagingManufacturing24(2):123–135.

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